Results

 

The implemented hardware design was tested in several ways, namely power efficiency, image quality and run time recovery delays. Some of those results are shown in this page.

 

* General Results

 

- Maximum operating frequency : 100 MHz

 

- Image hardware recovery degradation compared to Matlab recovery : -1.5dB

 

 

* Resource Usage

 

The developed hardware was implemented on a ZYZYNQ-7000 SoC ZC706 board, being the resulting usage shown on the table below.
 

 

 

 

 

 

 

 

* Image Recovery

 

Each image to be tested was divided into patches, each patch sampled and then recovered using the IHT co-processor. The patch division could be made without superimposing patches or by using a level od superimposition.

Depending on this level of superimposition, the quality of the recovery was affected. The results obtained for a 4 megapixel image are shown below.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

A graph of the evolution of the PSNR and another of the evolution of the SSIM as the superimposition changes are shown below. It can be seen that while the PSNR evolves in a linear way, the SSIM shows a more exponential tendency.

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

* Power Consumption for Several Clock Frequencies

 

The implementation was tested for several operationg clock frequencies. Using the Vivado Design Suite, an estimation of the power consumption of the design could be made.

 

 

 

 

 

 

 

 

 

 

 

 

* Recovery Speed for 100MHz Clock Frequency

 

The recovery run time was tested for all superimposition levels (from 0 to 7) and done in both the MATLAB and hardware implementations to evaluate the speedup. Several images were tested, being shown in the table below the results for a 2 megapixel image (Lion1920x1080) and another 4 megapixel (Lion2560x1600) one.